WB32L003 Standard Peripherals Firmware Library

Data Fields
ADC_TypeDef Struct Reference
CMSIS » Wb32l003 » Device_Peripheral_peripherals

## Data Fields
__IOM uint32_t | CR0
__IOM uint32_t | CR1
__IOM uint32_t | CR2
__IOM uint32_t | RESULT0
__IOM uint32_t | RESULT1
__IOM uint32_t | RESULT2
__IOM uint32_t | RESULT3
__IOM uint32_t | RESULT4
__IOM uint32_t | RESULT5
__IOM uint32_t | RESULT6
__IOM uint32_t | RESULT7
__IOM uint32_t | RESULT
__IOM uint32_t | RESULT_ACC
__IOM uint32_t | HT
__IOM uint32_t | LT
__IM uint32_t | RESERVED0 [2]
__IOM uint32_t | INTEN
__IOM uint32_t | INTCLR
__IOM uint32_t | RAWINTSR
__IOM uint32_t | MSKINTSR
__IM uint32_t | RESERVED1 [3]
__IOM uint32_t | RESULT8
__IOM uint32_t | RESULT9
__IOM uint32_t | RESULT10
__IOM uint32_t | RESULT11
__IOM uint32_t | RESULT12
__IOM uint32_t | RESULT13
__IOM uint32_t | RESULT14
__IOM uint32_t | RESULT15

## Field Documentation

## ◆ CR0

__IOM uint32_t CR0

ADC control register 0, Address offset: 0x000

## ◆ CR1

__IOM uint32_t CR1

ADC control register 1, Address offset: 0x004

## ◆ CR2

__IOM uint32_t CR2

ADC control register 2, Address offset: 0x008

## ◆ HT

__IOM uint32_t HT

Compare high threshold, Address offset: 0x034

## ◆ INTCLR

__IOM uint32_t INTCLR

Interrupt clear register, Address offset: 0x048

## ◆ INTEN

__IOM uint32_t INTEN

Interrupt enable register, Address offset: 0x044

## ◆ LT

__IOM uint32_t LT

Compare low threshold, Address offset: 0x038

## ◆ MSKINTSR

__IOM uint32_t MSKINTSR

Post-mask interrupt status register, Address offset: 0x050

## ◆ RAWINTSR

__IOM uint32_t RAWINTSR

Pre-mask interrupt status register, Address offset: 0x04C

## ◆ RESERVED0

__IM uint32_t RESERVED0[2]

Reserved, 0x03C

## ◆ RESERVED1

__IM uint32_t RESERVED1[3]

Reserved, 0x054

## ◆ RESULT

__IOM uint32_t RESULT

Channel result register, Address offset: 0x02C

## ◆ RESULT0

__IOM uint32_t RESULT0

Channel 0 result register, Address offset: 0x00C

## ◆ RESULT1

__IOM uint32_t RESULT1

Channel 1 result register, Address offset: 0x010

## ◆ RESULT10

__IOM uint32_t RESULT10

Channel 10 result register, Address offset: 0x060

## ◆ RESULT11

__IOM uint32_t RESULT11

Channel 11 result register, Address offset: 0x060

## ◆ RESULT12

__IOM uint32_t RESULT12

Channel 12 result register, Address offset: 0x060

## ◆ RESULT13

__IOM uint32_t RESULT13

Channel 13 result register, Address offset: 0x060

## ◆ RESULT14

__IOM uint32_t RESULT14

Channel 14 result register, Address offset: 0x060

## ◆ RESULT15

__IOM uint32_t RESULT15

Channel 15 result register, Address offset: 0x060

## ◆ RESULT2

__IOM uint32_t RESULT2

Channel 2 result register, Address offset: 0x014

## ◆ RESULT3

__IOM uint32_t RESULT3

Channel 3 result register, Address offset: 0x018

## ◆ RESULT4

__IOM uint32_t RESULT4

Channel 4 result register, Address offset: 0x01C

## ◆ RESULT5

__IOM uint32_t RESULT5

Channel 5 result register, Address offset: 0x020

## ◆ RESULT6

__IOM uint32_t RESULT6

Channel 6 result register, Address offset: 0x024

## ◆ RESULT7

__IOM uint32_t RESULT7

Channel 7 result register, Address offset: 0x028

## ◆ RESULT8

__IOM uint32_t RESULT8

Channel 8 result register, Address offset: 0x060

## ◆ RESULT9

__IOM uint32_t RESULT9

Channel 9 result register, Address offset: 0x060

## ◆ RESULT_ACC

__IOM uint32_t RESULT_ACC

Channel result accumulate register, Address offset: 0x030

The documentation for this struct was generated from the following file:

- wb32l003.h