WB32L003 Standard Peripherals Firmware Library

Data Fields
RCC_TypeDef Struct Reference
CMSIS » Wb32l003 » Device_Peripheral_peripherals

## Data Fields
__IOM uint32_t | HCLKDIV
__IOM uint32_t | PCLKDIV
__IOM uint32_t | HCLKEN
__IOM uint32_t | PCLKEN
__IOM uint32_t | MCOCR
__IM uint32_t | RESERVED0
__IOM uint32_t | RSTCR
__IOM uint32_t | RSTSR
__IOM uint32_t | SYSCLKCR
__IOM uint32_t | SYSCLKSEL
__IOM uint32_t | HSICR
__IOM uint32_t | HSECR
__IOM uint32_t | LSICR
__IOM uint32_t | LSECR
__IOM uint32_t | IRQLATENCY
__IOM uint32_t | STICKCR
__IOM uint32_t | SWDIOCR
__IOM uint32_t | PERIRST
__IOM uint32_t | RTCRST
__IM uint32_t | RESERVED1 [5]
__IOM uint32_t | UNLOCK
__IOM uint32_t | RESERVED2 [203]
__IOM uint32_t | HSISTABCR
__IOM uint32_t | HSITC
__IOM uint32_t | LSITC

## Field Documentation

## ◆ HCLKDIV

__IOM uint32_t HCLKDIV

RCC AHB clock prescale register, Address offset: 0x000

## ◆ HCLKEN

__IOM uint32_t HCLKEN

RCC AHB peripheral model clock enable register, Address offset: 0x008

## ◆ HSECR

__IOM uint32_t HSECR

RCC hse control register, Address offset: 0x02C

## ◆ HSICR

__IOM uint32_t HSICR

RCC hsi control register, Address offset: 0x028

## ◆ HSISTABCR

__IOM uint32_t HSISTABCR

RCC register, Address offset: 0x390

## ◆ HSITC

__IOM uint32_t HSITC

RCC Internal high speed OSC control register 2, Address offset: 0x394

## ◆ IRQLATENCY

__IOM uint32_t IRQLATENCY

RCC m0 irq delay register, Address offset: 0x038

## ◆ LSECR

__IOM uint32_t LSECR

RCC lse control register, Address offset: 0x034

## ◆ LSICR

__IOM uint32_t LSICR

RCC lsi control register, Address offset: 0x030

## ◆ LSITC

__IOM uint32_t LSITC

RCC register, Address offset: 0x398

## ◆ MCOCR

__IOM uint32_t MCOCR

RCC clock output control register, Address offset: 0x010

## ◆ PCLKDIV

__IOM uint32_t PCLKDIV

RCC apb clock prescale register, Address offset: 0x004

## ◆ PCLKEN

__IOM uint32_t PCLKEN

RCC apb peripheral model clock enable register, Address offset: 0x00C

## ◆ PERIRST

__IOM uint32_t PERIRST

RCC peripheral model control register, Address offset: 0x044

## ◆ RESERVED0

__IM uint32_t RESERVED0

Address offset: 0x014

## ◆ RESERVED1

__IM uint32_t RESERVED1[5]

Address offset: 0x04C

## ◆ RESERVED2

__IOM uint32_t RESERVED2[203]

Address offset: 0x064

## ◆ RSTCR

__IOM uint32_t RSTCR

RCC system reset control register, Address offset: 0x018

## ◆ RSTSR

__IOM uint32_t RSTSR

RCC reset status register, Address offset: 0x01C

## ◆ RTCRST

__IOM uint32_t RTCRST

RCC rtc control register, Address offset: 0x048

## ◆ STICKCR

__IOM uint32_t STICKCR

RCC systick timer circle adjust register, Address offset: 0x03C

## ◆ SWDIOCR

__IOM uint32_t SWDIOCR

RCC endpoint function select register, Address offset: 0x040

## ◆ SYSCLKCR

__IOM uint32_t SYSCLKCR

RCC clk setting register, Address offset: 0x020

## ◆ SYSCLKSEL

__IOM uint32_t SYSCLKSEL

RCC system clock select register, Address offset: 0x024

## ◆ UNLOCK

__IOM uint32_t UNLOCK

RCC register protect register, Address offset: 0x060

The documentation for this struct was generated from the following file:

- wb32l003.h