GPIO_TypeDef结构体 参考

成员变量
__IOM uint32_t	DIRCR
__IOM uint32_t	OTYPER
__IOM uint32_t	ODR
__IOM uint32_t	IDR
__IOM uint32_t	INTEN
__IOM uint32_t	RAWINTST
__IOM uint32_t	MSKINTSR
__IOM uint32_t	INTCLR
__IOM uint32_t	INTTYPCR
__IOM uint32_t	INTPOLCR
__IOM uint32_t	INTANY
__IOM uint32_t	ODSET
__IOM uint32_t	ODCLR
__IOM uint32_t	INDBEN
__IOM uint32_t	DBCLKCR
__IOM uint32_t	PUPDR
__IOM uint32_t	SLEWCR
__IOM uint32_t	DRVCR
__IOM uint32_t	AFR

结构体成员变量说明

AFR

__IOM uint32_t AFR

GPIO multiplex function register, Address offset: 0x048

DBCLKCR

__IOM uint32_t DBCLKCR

GPIO input debounce clock config register, Address offset: 0x038

DIRCR

__IOM uint32_t DIRCR

GPIO input output model register, Address offset: 0x000

DRVCR

__IOM uint32_t DRVCR

GPIO driver strength config register, Address offset: 0x044

IDR

__IOM uint32_t IDR

GPIO input data register, Address offset: 0x00C

INDBEN

__IOM uint32_t INDBEN

GPIO input debounce and synchronous enable register, Address offset: 0x034

INTANY

__IOM uint32_t INTANY

GPIO edge trigger interrupt register, Address offset: 0x028

INTCLR

__IOM uint32_t INTCLR

GPIO interrupt clear register, Address offset: 0x01C

INTEN

__IOM uint32_t INTEN

GPIO inerrupt enable register, Address offset: 0x010

INTPOLCR

__IOM uint32_t INTPOLCR

GPIO interrupt sytle value register, Address offset: 0x024

INTTYPCR

__IOM uint32_t INTTYPCR

GPIO interrupt style register, Address offset: 0x020

MSKINTSR

__IOM uint32_t MSKINTSR

GPIO interrupt status register, Address offset: 0x018

ODCLR

__IOM uint32_t ODCLR

GPIO output clear register, Address offset: 0x030

ODR

__IOM uint32_t ODR

GPIO output data register, Address offset: 0x008

ODSET

__IOM uint32_t ODSET

GPIO output setting register, Address offset: 0x02C

OTYPER

__IOM uint32_t OTYPER

GPIO output type register, Address offset: 0x004

PUPDR

__IOM uint32_t PUPDR

GPIO pullup and pulldown register, Address offset: 0x03C

RAWINTST

__IOM uint32_t RAWINTST

GPIO interrupt raw status register, Address offset: 0x014

SLEWCR

__IOM uint32_t SLEWCR

GPIO voltage convertion speed control register, Address offset: 0x040

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该结构体的文档由以下文件生成:

• wb32l003.h