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WB32L003 Standard Peripherals Firmware Library
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成员变量 | |
| __IOM uint32_t | HCLKDIV |
| __IOM uint32_t | PCLKDIV |
| __IOM uint32_t | HCLKEN |
| __IOM uint32_t | PCLKEN |
| __IOM uint32_t | MCOCR |
| __IM uint32_t | RESERVED0 |
| __IOM uint32_t | RSTCR |
| __IOM uint32_t | RSTSR |
| __IOM uint32_t | SYSCLKCR |
| __IOM uint32_t | SYSCLKSEL |
| __IOM uint32_t | HSICR |
| __IOM uint32_t | HSECR |
| __IOM uint32_t | LSICR |
| __IOM uint32_t | LSECR |
| __IOM uint32_t | IRQLATENCY |
| __IOM uint32_t | STICKCR |
| __IOM uint32_t | SWDIOCR |
| __IOM uint32_t | PERIRST |
| __IOM uint32_t | RTCRST |
| __IM uint32_t | RESERVED1 [5] |
| __IOM uint32_t | UNLOCK |
| __IOM uint32_t | RESERVED2 [203] |
| __IOM uint32_t | HSISTABCR |
| __IOM uint32_t | HSITC |
| __IOM uint32_t | LSITC |
| __IOM uint32_t HCLKDIV |
RCC AHB clock prescale register, Address offset: 0x000
| __IOM uint32_t HCLKEN |
RCC AHB peripheral model clock enable register, Address offset: 0x008
| __IOM uint32_t HSECR |
RCC hse control register, Address offset: 0x02C
| __IOM uint32_t HSICR |
RCC hsi control register, Address offset: 0x028
| __IOM uint32_t HSISTABCR |
RCC register, Address offset: 0x390
| __IOM uint32_t HSITC |
RCC Internal high speed OSC control register 2, Address offset: 0x394
| __IOM uint32_t IRQLATENCY |
RCC m0 irq delay register, Address offset: 0x038
| __IOM uint32_t LSECR |
RCC lse control register, Address offset: 0x034
| __IOM uint32_t LSICR |
RCC lsi control register, Address offset: 0x030
| __IOM uint32_t LSITC |
RCC register, Address offset: 0x398
| __IOM uint32_t MCOCR |
RCC clock output control register, Address offset: 0x010
| __IOM uint32_t PCLKDIV |
RCC apb clock prescale register, Address offset: 0x004
| __IOM uint32_t PCLKEN |
RCC apb peripheral model clock enable register, Address offset: 0x00C
| __IOM uint32_t PERIRST |
RCC peripheral model control register, Address offset: 0x044
| __IM uint32_t RESERVED0 |
Address offset: 0x014
| __IM uint32_t RESERVED1[5] |
Address offset: 0x04C
| __IOM uint32_t RESERVED2[203] |
Address offset: 0x064
| __IOM uint32_t RSTCR |
RCC system reset control register, Address offset: 0x018
| __IOM uint32_t RSTSR |
RCC reset status register, Address offset: 0x01C
| __IOM uint32_t RTCRST |
RCC rtc control register, Address offset: 0x048
| __IOM uint32_t STICKCR |
RCC systick timer circle adjust register, Address offset: 0x03C
| __IOM uint32_t SWDIOCR |
RCC endpoint function select register, Address offset: 0x040
| __IOM uint32_t SYSCLKCR |
RCC clk setting register, Address offset: 0x020
| __IOM uint32_t SYSCLKSEL |
RCC system clock select register, Address offset: 0x024
| __IOM uint32_t UNLOCK |
RCC register protect register, Address offset: 0x060